Peak current reduction by simultaneous state replication and re-encoding

Reducing circuit's peak current plays an important role in circuit reliability in deep sub-micron era. For sequential circuits, it is observed that the peak current has a strong correlation with the maximal number of state registers switching from one logic value to another during a single state transition [2], which we refer to as peak switching value (PSV). We propose to minimize PSV by seamlessly combining two basic techniques: state replication and state reencoding. Our algorithm leverage the most constrained least constraining paradigm and has polynomial complexity in terms of the number of states in the finite state machine model of the circuit. For 52 MCNC benchmark circuits encoded with a state-of-the-art dynamic power driven encoding algorithm POW3 [1], 36 circuits' PSV is not minimized. Our algorithm has successfully reduced PSV on 34 of them while achieving an average of 7% saving on total switching activity (TSA). The total execution time on all the 52 benchmarks...

• Type: Journal
• Year: 2010
• Where: ICCAD
• Authors: Junjun Gu, Gang Qu, Lin Yuan, Qiang Zhou
• Keywords: Deep Sub-micron Era, Hardware, ICCAD 2010, Peak Current, Single State Transition