Sciweavers

ISPASS
2010
IEEE

Performance-effective operation below Vcc-min

13 years 11 months ago
Performance-effective operation below Vcc-min
Continuous circuit miniaturization and increased process variability point to a future with diminishing returns from dynamic voltage scaling. Operation below Vcc-min has been proposed recently as a mean to reverse this trend. The goal of this paper is to minimize the performance loss due to reduced cache capacity when operating below Vcc-min. A simple method is proposed: disable faulty blocks at low voltage. The method is based on observations regarding the distributions of faults in an array according to probability theory. The key lesson, from the probability analysis, is that as the number of uniformly distributed random faulty cells in an array increases the faults increasingly occur in already faulty blocks. The probability analysis is also shown to be useful for obtaining insight about the reliability implications of other cache techniques. For one configuration used in this paper, block disabling is shown to have on the average 6.6% and up to 29% better performance than a prev...
Nikolas Ladas, Yiannakis Sazeides, Veerle Desmet
Added 17 May 2010
Updated 17 May 2010
Type Conference
Year 2010
Where ISPASS
Authors Nikolas Ladas, Yiannakis Sazeides, Veerle Desmet
Comments (0)