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ENTCS
2008

Performance Evaluation of Elastic GALS Interfaces and Network Fabric

8 years 7 months ago
Performance Evaluation of Elastic GALS Interfaces and Network Fabric
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficiently one can synchronize into a clocked domain when elastic interfaces are utilized. Simulations show that the latency insensitive network allows excellent characterization of network performance in terms of the cost of routing, amount of blocking due to congestion, and message buffering. The network routers show that peak performance near 100% link utilization is achieved under congestion and combining. This enables accurate high-level modeling of the behavior of the network fabric so that optimized network design, including placement and routing, can occur through high-level network synthesis tools. The chip also shows that when elastic interfaces are used at the boundary of clock synchronization points then efficient domain crossings can occur. Buffering at the synchronization points are required to allow fo...
JunBok You, Yang Xu, Hosuk Han, Kenneth S. Stevens
Added 10 Dec 2010
Updated 10 Dec 2010
Type Journal
Year 2008
Where ENTCS
Authors JunBok You, Yang Xu, Hosuk Han, Kenneth S. Stevens
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