A phase-based stereo vision system-on-a-chip

A simple and fast technique for depth estimation based on phase measurement has been adopted for the implementation of a real-time stereo system with sub-pixel resolution on an FPGA device. The technique avoids the attendant problem of phase warping. The designed system takes full advantage of the inherent processing parallelism and segmentation capabilities of FPGA devices to achieve a computation speed of 65 megapixels/s, which can be arranged with a customized frame-grabber module to process 211 frames/s at a size of 640 × 480 pixels. The processing speed achieved is higher than conventional camera frame rates, thus allowing the system to extract multiple estimations and be used as a platform to evaluate integration schemes of a population of neurons without increasing hardware resource demands. © 2006 Elsevier Ireland Ltd. All rights reserved.

• Type: Journal
• Year: 2007
• Where: BIOSYSTEMS
• Authors: Javier Díaz, Eduardo Ros, Silvio P. Sabatini, Fabio Solari, Sonia Mota
• Keywords: BIOSYSTEMS 2007, Customized Frame-grabber Module, FPGA Devices, Inherent Processing Parallelism