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AINA
2009
IEEE

A Pipelined IP Forwarding Engine with Fast Update

10 years 1 months ago
A Pipelined IP Forwarding Engine with Fast Update
IP address lookup is one of the most important functionalities in the router design. To meet the requirements in high speed routers consisting of linecards with 40Gbps transfer rates, researchers usually take lookup/update speed, storage requirement, and scalability into consideration when designing a high performance forwarding engine. As a result, hardwarebased solutions are often used to develop a high speed router nowadays. In this paper, we develop a FPGAbased pipelined forwarding engine which focuses on reducing the update overhead. The proposed scheme partitions the routing table into several disjoint groups. The prefix which resides in the same group is interleaving stored into several memory modules to ensure the parallel comparison at the comparison stage. With the pipeline enabled, the throughput of the design can achieve the speed of OC-768. The update overhead can also be reduced.
Yeim-Kuan Chang, Yen-Cheng Liu, Fang-Chen Kuo
Added 18 May 2010
Updated 18 May 2010
Type Conference
Year 2009
Where AINA
Authors Yeim-Kuan Chang, Yen-Cheng Liu, Fang-Chen Kuo
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