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2008

PLCStudio: Simulation based PLC code verification

11 years 8 months ago
PLCStudio: Simulation based PLC code verification
Proposed in this paper is the architecture of a PLC programming environment that enables a visual verification of PLC programs. The proposed architecture integrates a PLC program with a corresponding plant model, so that users can intuitively verify the PLC program in a 3D graphic environment. The plant model includes all manufacturing devices of a production system as well as corresponding device programs to perform their tasks in the production system, and a PLC program contains the control logic for the plant model. For the implementation of the proposed PLC programming environment, it is essential to develop an efficient methodology to construct a virtual device model as well as a virtual plant model. The proposed PLC programming environment provides an efficient construction method for a plant model based on the DEVS (Discrete Event Systems Specifications) formalism, which supports the specification of discrete event models in a hierarchical, modular manner.
Sang C. Park, Chang Mok Park, Gi-Nam Wang, Jonggeu
Added 02 Oct 2010
Updated 02 Oct 2010
Type Conference
Year 2008
Where WSC
Authors Sang C. Park, Chang Mok Park, Gi-Nam Wang, Jonggeun Kwak, Sungjoo Yeo
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