A Polymorphic Register File for matrix operations

—Previous vector architectures divided the available register file space in a fixed number of registers of equal sizes and shapes. We propose a register file organization which allows dynamic creation of a variable number of multidimensional registers of arbitrary sizes referred to as a Polymorphic Register File. Our objective is to evaluate the performance benefits of the proposed organization. Simulation results using real applications (Floyd and CG) suggest speedups of up to 3 times compared to the Cell SPU for Floyd and 2 times compared to a one dimensional vectorized version of the sparse matrix vector multiplication. Moreover, in the same experimental context, a large reduction in the number of executed instructions of up to 3000 times for Floyd and 2000 times for sparse matrix vector multiplication is achieved.

• Type: Journal
• Year: 2010
• Where: SAMOS
• Authors: Catalin Bogdan Ciobanu, Georgi Kuzmanov, Georgi Gaydadjiev, Alex Ramírez
• Keywords: Embedded Systems, Matrix Vector Multiplication, Register file Space, SAMOS 2010, Sparse Matrix Vector