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ICCD
2008
IEEE

Power-aware soft error hardening via selective voltage scaling

9 years 2 months ago
Power-aware soft error hardening via selective voltage scaling
—Nanoscale integrated circuits are becoming increasingly sensitive to radiation-induced transient faults (soft errors) due to current technology scaling trends, such as shrinking feature sizes and reducing supply voltages. Soft errors, which have been a significant concern in memories, are now a main factor in reliability degradation of logic circuits. This paper presents a power-aware methodology using dual supply voltages for soft error hardening. Given a constraint on power overhead, our proposed framework can minimize the soft error rate (SER) of a circuit via selective voltage scaling. On average, circuit SER can be reduced by 33.45% for various
Kai-Chiang Wu, Diana Marculescu
Added 15 Mar 2010
Updated 15 Mar 2010
Type Conference
Year 2008
Where ICCD
Authors Kai-Chiang Wu, Diana Marculescu
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