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2003
ACM

Power efficient encoding techniques for off-chip data buses

10 years 5 months ago
Power efficient encoding techniques for off-chip data buses
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as they consume a significant amount of total power. Since the bus power consumption is proportional to the switching activity, reducing the bus switching is an effective way to reduce bus power. While numerous techniques exist for reducing bus power in address buses, only a handful of techniques have been proposed for data-bus power reduction, where Frequent Value Encoding (FVE) is the best existing scheme to reduce the transition activity on the data buses. In this paper, we propose improved frequent value data-bus encoding techniques aimed at reducing more switching activity and hence, more power consumption. We propose three new schemes and five new variations to exploit bit-wise temporal and spatial locality in the data bus values. Our technique does not use additional external control signal and captures ...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa
Added 05 Jul 2010
Updated 05 Jul 2010
Type Conference
Year 2003
Where CASES
Authors Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar, Laxmi N. Bhuyan
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