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AINA
2009
IEEE

Predictive Simulation of HPC Applications

10 years 11 months ago
Predictive Simulation of HPC Applications
The architectures which support modern supercomputing machinery are as diverse today, as at any point during the last twenty years. The variety of processor core arrangements, threading strategies and the arrival of heterogeneous computation nodes are driving modern-day solutions to petaflop speeds. The increasing complexity of such systems, as well as codes written to take advantage of the new computational abilities, pose significant frustrations for existing techniques which aim to model and analyse the performance of such hardware and software. In this paper we demonstrate the use of post-execution analysis on trace-based profiles to support the construction of simulation-based models. This involves combining the runtime capture of call-graph information with computational timings, which in turn allows representative models of code behaviour to be extracted. The main advantage of this technique is that it largely automates performance model development, a burden associated with...
Simon D. Hammond, J. A. Smith, Gihan R. Mudalige,
Added 18 May 2010
Updated 18 May 2010
Type Conference
Year 2009
Where AINA
Authors Simon D. Hammond, J. A. Smith, Gihan R. Mudalige, Stephen A. Jarvis
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