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ASPLOS
2008
ACM

Predictor virtualization

13 years 5 months ago
Predictor virtualization
Many hardware optimizations rely on collecting information about program behavior at runtime. This information is stored in lookup tables. To be accurate and effective, these optimizations usually require large dedicated on-chip tables. Although technology advances offer an increased amount of on-chip resources, these resources are allocated to increase the size of on-chip conventional cache hierarchies. This work proposes Predictor Virtualization, a technique that uses the existing memory hierarchy to emulate large predictor tables. We demonstrate the benefits of this technique by virtualizing a state-of-the-art data prefetcher. Full-system, cycle-accurate simulations demonstrate that the virtualized prefetcher preserves the performance benefits of the original design, while reducing the on-chip storage dedicated to the predictor table from 60KB down to less than one kilobyte. Categories and Subject Descriptors B.3.2 [Memory Structures]: Design Styles -- Cache memories General Terms ...
Ioana Burcea, Stephen Somogyi, Andreas Moshovos, B
Added 12 Oct 2010
Updated 12 Oct 2010
Type Conference
Year 2008
Where ASPLOS
Authors Ioana Burcea, Stephen Somogyi, Andreas Moshovos, Babak Falsafi
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