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DAC
2009
ACM

Process variation characterization of chip-level multiprocessors

11 years 22 days ago
Process variation characterization of chip-level multiprocessors
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem via conservative assumptions is sub-optimal. Instead, operating systems may adapt task assignment and power management decisions to the variable characteristics of cores, improving system-wide power consumption and performance. Researchers have proposed such adaptation techniques. However, they rely on knowledge of CMP process variation (PV) maps. These maps are not provided by processor vendors, providing them would impose additional cost during the testing process, and static maps would not permit adaptation to aging effects. Further progress on developing and validating PV aware control techniques for CMPs requires access to PV maps for real processors. We present an online technique to extract the PV maps of CMPs. Potentially automatic temperature measurements with built-in on-die sensors during the exec...
Lide Zhang, Lan S. Bai, Robert P. Dick, Li Shang,
Added 12 Nov 2009
Updated 12 Nov 2009
Type Conference
Year 2009
Where DAC
Authors Lide Zhang, Lan S. Bai, Robert P. Dick, Li Shang, Russ Joseph
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