Pulse Generation for On-chip Data Transmission

Abstract—Pulse-based data transmission has been demonstrated as a power-saving and high performance alternative to level-based signalling over global distances. Key to its correct operation is the use of reliable and low latency pulse generators. We propose a simple design of pulse generator, evaluate its performance and show a design that offers greater safeguards against malformed input signals. We show how performance scales with interconnect length, consider signal-integrity issues and also present a method of repeating the signal to allow transmission over wire lengths exceeding 3mm, and data rates exceeding 1Gbit/s. Results are presented by simulation as part of a a full pulsebased asynchronous Network-on-Chip. Simulation in a NoC context produces much more accurate results for factors such as delay than when simulating in isolation. Our simulations are carried out using a full RLC model, as opposed to the more common RC model. Inclusion of inductance further increases our resu...

• Type: Conference
• Year: 2009
• Where: DSD
• Authors: Simon Hollis
• Keywords: Abstract—Pulse-based Data Transmission, DSD 2009, Hardware, Latency Pulse Generators, Pulse Generator