Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures

As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify their functional behavior (qualitative properties) and to predict their performance (quantitative properties). This paper presents the work currently done in the Multival project (pˆole de comp´etitivit´e mondial Minalogic), in which verification and performance evaluation tools developed at INRIA and Saarland University are applied to three industrial architectures designed by Bull, CEA/Leti and STMicroelectronics.

• Type: Conference
• Year: 2008
• Where: DATE
• Authors: Nicolas Coste, Hubert Garavel, Holger Hermanns, Richard Hersemeule, Yvain Thonnart, Meriem Zidouni
• Keywords: Comp´etitivit´e Mondial Minalogic, DATE 2008, Hardware, Multiprocessor Architectures, Performance Evaluation Tools