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DAC
2010
ACM

RAMP gold: an FPGA-based architecture simulator for multiprocessors

13 years 4 months ago
RAMP gold: an FPGA-based architecture simulator for multiprocessors
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throughput, cycle-accurate full-system simulator that runs on a single Xilinx Virtex-5 FPGA board, and which simulates a 64-core shared-memory target machine capable of booting real operating systems. To improve FPGA implementation efficiency, functionality and timing are modeled separately and host multithreading is used in both models. We evaluate the prototype's performance using a modern parallel benchmark suite running on our manycore research operating system, achieving two orders of magnitude speedup compared to a widely-used software-based architecture simulator. Categories and Subject Descriptors C.5.3 [Computer System Implementation]: Microprocessors; I.6.8 [Simulation and Modeling]: Discrete Event General Terms Design, Performance, Experimentation Keywords Multiprocessors, FPGA, Simulation
Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yun
Added 05 Dec 2010
Updated 05 Dec 2010
Type Conference
Year 2010
Where DAC
Authors Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, David A. Patterson, Krste Asanovic
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