Reactive Multi-Word Synchronization for Multiprocessors

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Reactive Multi-Word Synchronization for Multiprocessors
Shared memory multiprocessor systems typically provide a set of hardware primitives in order to support synchronization. Generally, they provide single-word read-modify-write hardware primitives such as compare-and-swap, load-linked/store-conditional and fetchand-op, from which the higher-level synchronization operations are then implemented in software. Although the single-word hardware primitives are conceptually powerful enough to support higher-level synchronization, from the programmer’s point of view they are not as useful as their generalizations to the multi-word objects. This paper presents two fast and reactive lock-free multi-word compare-and-swap algorithms. The algorithms dynamically measure the level of contention as well as the memory conflicts of the multi-word compare-and-swap operations, and in response, they react accordingly in order to guarantee good performance in a wide range of system conditions. The algorithms are non-blocking (lock-free), allowing in this ...
Phuong Hoai Ha, Philippas Tsigas
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Authors Phuong Hoai Ha, Philippas Tsigas
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