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ICDE
2011
IEEE

Real-time pattern matching with FPGAs

8 years 2 months ago
Real-time pattern matching with FPGAs
— We demonstrate a hardware implementation of a complex event processor, built on top of field-programmable gate arrays (FPGAs). Compared to CPU-based commodity systems, our solution shows distinctive advantages for stream monitoring tasks, e.g., wire-speed processing and predictable performance. The demonstration is based on a query-to-hardware compiler for complex event patterns that we presented at VLDB 2010 [1]. By example of a click stream monitoring application, we illustrate the inner workings of our compiler and indicate how FPGAs can act as efficient and reliable processors for event streams.
Louis Woods, Jens Teubner, Gustavo Alonso
Added 21 Aug 2011
Updated 21 Aug 2011
Type Journal
Year 2011
Where ICDE
Authors Louis Woods, Jens Teubner, Gustavo Alonso
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