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2006
ACM

Reducing power through compiler-directed barrier synchronization elimination

11 years 11 months ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, many parallelizing compilers are very conservative in inserting barrier synchronizations at the end of each and every parallel loop. This can lead to significant power consumption in chip multiprocessor based execution environments. This paper proposes a compiler-directed approach for eliminating such synchronization calls between neighboring parallel loops. It achieves its goal by partitioning loop iterations across processors such that each processor executes iterations from both the loops that access the same set of array elements. We implemented the proposed approach using an experimental compilation framework and made experiments with ten SPEC benchmark codes. Our experiments clearly show that the proposed compilerdirected approach is very effective and reduces energy overheads due to synchronizations by...
Mahmut T. Kandemir, Seung Woo Son
Added 13 Jun 2010
Updated 13 Jun 2010
Type Conference
Year 2006
Where ISLPED
Authors Mahmut T. Kandemir, Seung Woo Son
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