Tsinghua U.

Refereeing conflicts in hardware transactional memory

10 years 8 days ago
Refereeing conflicts in hardware transactional memory
In the search for high performance, most transactional memory (TM) systems execute atomic blocks concurrently and must thus be prepared for data conflicts. The TM system must then choose a policy to decide when and how to manage the resulting contention. In this paper, we analyze the interplay between conflict resolution time and contention management policy in the context of hardware-supported TM systems, highlighting both the implementation tradeoffs and the performance implications of the various points in the design space. We show that both policy decisions have a significant impact on the ability to exploit available parallelism and thereby affect overall performance. Our analysis corroborates previous research findings that stalling (especially prior to retrying an access rather than the entire transaction) helps sidestep conflicts and avoid wasted work. We also demonstrate that conflict resolution time has the dominant effect on performance: lazy (which delays resolution to com...
Arrvindh Shriraman, Sandhya Dwarkadas
Added 19 Feb 2011
Updated 19 Feb 2011
Type Journal
Year 2009
Where ICS
Authors Arrvindh Shriraman, Sandhya Dwarkadas
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