Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems

—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of the most effective techniques used to achieve low power specification. On the other hand, as the feature size of logic gates (and transistors) is becoming smaller and smaller, the effect of soft error rates caused by single event upsets (SEUs) becomes exponentially greater. Lowering supply voltage to save energy increases soft error rates caused by SEU for two reasons: I) lower voltage makes digital circuits more prone to soft errors and II) reduction in supply voltage, increases the duration of process which increases the chances of being hit by SEU. In this paper, we propose an optimal methodology for DVS on a task graph with consideration of soft error rate. We consider the effects of voltage on SEU and incorporate this dependency in our formulation to develop a new method for energy optimization under SEU...

• Type: Conference
• Year: 2008
• Where: ISQED
• Authors: Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sarrafzadeh
• Keywords: Hardware, ISQED 2008, Soft Error Rate, Supply Voltage, Voltage