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ICPP
2009
IEEE

A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication

11 years 9 months ago
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst others is important in current and upcoming Partitioned Global Address Space (PGAS) systems. In this work, a virtualized hardware unit is described which is resource optimized, exhibits high overlap, processor offload and very good latency characteristics. To start an RMA operation a single HyperTransport packet caused by one CPU instruction is sufficient, thus reducing latency to an absolute minimum. In addition to the basic architecture an implementation in FPGA technology is presented together with an evaluation of the target ASIC-implementation. The current system can sustain more than 4.9 million transactions per second on the FPGA and exhibits an
Mondrian Nüssle, Martin Scherer, Ulrich Br&uu
Added 19 Feb 2011
Updated 19 Feb 2011
Type Journal
Year 2009
Where ICPP
Authors Mondrian Nüssle, Martin Scherer, Ulrich Brüning
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