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DAC
1999
ACM

Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks

10 years 1 days ago
Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks
A number of researchers have proposed using digital marks to provide ownership identification for intellectual property. Many of these techniques share three specific weaknesses: complexity of copy detection, vulnerability to mark removal after revelation for ownership verification, and mark integrity issues due to partial mark removal. This paper presents a method for watermarking field programmable gate array (FPGA) intellectual property (IP) that achieves robustness by responding to these three weaknesses. The key technique involves using secure hash functions to generate and embed multiple small marks that are more detectable, verifiable, and secure than existing IP protection techniques. Keywords Field programmable gate array (FPGA), intellectual property protection, watermarking
John Lach, William H. Mangione-Smith, Miodrag Potk
Added 13 Nov 2009
Updated 13 Nov 2009
Type Conference
Year 1999
Where DAC
Authors John Lach, William H. Mangione-Smith, Miodrag Potkonjak
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