Sciweavers

Share
ISCAS
2005
IEEE

On the robustness of an analog VLSI implementation of a time encoding machine

10 years 5 months ago
On the robustness of an analog VLSI implementation of a time encoding machine
Abstract— Time encoding is a mechanism for representing the information contained in a continuous time, bandlimited, analog signal as the zero-crossings of a binary signal. Time decoding algorithms have been developed that make a perfect recovery of time encoded bandlimited signals possible. We consider a simple one-opamp active RC implementation of the time encoder and investigate the robustness in performance of the time decoder when the former is subject to non-idealities of the analog VLSI realization. We show that up to a constant scaling factor, delay and offset the input signal can be accurately reconstructed even if the opamp has a finite DC gain and finite bandwidth and the circuit exhibits parameter offsets. We develop an experimental upper bound for the reconstruction error that can be used in the design of the encoder. The analytical results are verified with numerical simulations.
Peter R. Kinget, Aurel A. Lazar, Laszlo T. Toth
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where ISCAS
Authors Peter R. Kinget, Aurel A. Lazar, Laszlo T. Toth
Comments (0)
books