The SFRA: a corner-turn FPGA architecture

FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better to employ fixed-frequency FPGAs operating at a high clock frequency. Such fixed-frequency arrays require pipelined interconnect structures, which are difficult to support in a traditional FPGA architecture. We have developed a novel approach, called a “corner-turn” interconnect, based on a Manhattan array of logically depopulated Sboxes with full connectivity but limited routability. This interconnect supports new polynomial-time routing techniques while maintaining conventional placement and other upstream toolflow. We have used the corner-turn interconnect to define a fixed-frequency FPGA architecture, the SFRA, that is largely compatible with the Xilinx Virtex while providing higher speed, pipelined operation. Our tools automatically repipeline designs to operate at the SFRA’s intrinsic clock fr...

• Type: Conference
• Year: 2004
• Where: FPGA
• Authors: Nicholas Weaver, John R. Hauser, John Wawrzynek
• Keywords: FPGA, FPGA 2004, Hardware, SFRA’s Intrinsic Clock, fixed-frequency Fpga