Simulation based architectural power estimation for PLA-based controllers

We present an architectural power simulation technique for PLA-based controllers. The contributions of this work are (1) a simple but ecient power characterization of PLAs; and (2) a strategy for developing a simulatable power model from the input description. Node Switching Capacitance (nsc) of a sub-component (such as and plane) in a PLA is the average capacitance switched by a node in the sub-component, when the node undergoes a power consuming transition (0 1). Power characterization involves extracting nsc equations for dierent sub-components as a function of input size, output size and number of terms. Prototype plas whose are employed to derive nsc equations for a given technology. The input description is modied for power simulation by adding nsc equations with dependent variables instanced to the controller's parameters. For a given input sequence, the modied vhdl description is simulated to estimate the total power consumption. Experimental Results are obtained with ...

• Type: Conference
• Year: 1996
• Where: ISLPED
• Authors: Srinivas Katkoori, Ranga Vemuri
• Keywords: Hardware, ISLPED 1996, Nsc Equations, Power Characterization, Power Simulation