Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

8

DAC
1999
ACM

favoriteEmaildiscussreport

112views Computer Architecture» more DAC 1999»

Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations

14 years 5 months ago

Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations

Download www.ece.northwestern.edu

Hai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz

Real-time Traffic

Buffer Locations | DAC 1999 | Design Automation |

claim paper

Related Content

» Maze Routing with Buffer Insertion under Transition Time Constraints

» Buffered Routing Tree Construction under Buffer Placement Blockages

» Simultaneous Shield and Buffer Insertion for Crosstalk Noise Reduction in Global Routing

» Congestion Estimation with Buffer Planning in Floorplan Design

» A Fast Buffered Routing Tree Construction Algorithm under Accurate Delay Model

» Timingdriven global routing with efficient buffer insertion

» A fully polynomial time approximation scheme for timing driven minimum cost buffer inserti...

» Integrating buffer planning with floorplanning for simultaneous multiobjective optimizatio...

» Optimal buffered routing path constructions for single and multiple clock domain systems

Post Info
More Details (n/a)

Added	13 Nov 2009
Updated	13 Nov 2009
Type	Conference
Year	1999
Where	DAC
Authors	Hai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz

Comments (0)