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SEUS
2009
IEEE

A Single-Path Chip-Multiprocessor System

12 years 4 months ago
A Single-Path Chip-Multiprocessor System
Abstract. In this paper we explore the combination of a time-predictable chipmultiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main memory access provides time-predictable memory load and store instructions. Single-path programming avoids control flow dependent timing variations. To keep the execution time of tasks constant, even in the case of shared memory access of several processor cores, the tasks on the cores are synchronized with the time-sliced memory arbitration unit.
Martin Schoeberl, Peter P. Puschner, Raimund Kirne
Added 21 May 2010
Updated 21 May 2010
Type Conference
Year 2009
Where SEUS
Authors Martin Schoeberl, Peter P. Puschner, Raimund Kirner
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