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2005
IEEE

Speculative Parallel Threading Architecture and Compilation

10 years 5 months ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its input data are ready. This technique appears particularly appealing for speeding up hardto-parallelize applications. Although various threadlevel speculation architectures and compilation techniques have been proposed by the research community, scalar applications remain difficult to be parallelized. It has not yet shown how well these applications can actually be benefited from threadlevel speculation and if the performance gain is significant enough to justify the required hardware support. In an attempt to understand and realize the potential gain with thread-level speculation especially for scalar applications, we proposed an SPT (Speculative Parallel Threading) architecture and developed an SPT compiler to generate optimal speculatively parallelized code. Our evaluation showed that with our SPT approach 10 ...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where ICPPW
Authors Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Lim, Tin-Fook Ngai
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