State Relaxation Based Subsequence Removal for Fast Static Compaction in Sequential Circuits

We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to identify more or larger cycles in a test set. State relaxation creates more opportunities for subsequence removal andhence, results in better compaction. Relaxation of a state is possible since not all memory elements in a nite state machine have to be speci ed for a state transition. The proposed technique has several advantages: 1 test sets that could not be compacted by existing subsequence removal techniques can now be compacted, 2 the size of cycles in a test set can be signi cantly increased by state relaxation and removal of the larger sized cycles leads to better compaction, 3 only two fault simulation passes are required as compared to trial and re-trial methods that require multiple fault simulation passes, and 4 signi cantly higher compaction is achieved in short execution times as compared to known sub...

• Type: Conference
• Year: 1998
• Where: DATE
• Authors: Michael S. Hsiao, Srimat T. Chakradhar
• Keywords: DATE 1998, Hardware, State Relaxation, Subsequence Removal, Subsequence Removal Techniques