Statistical design and optimization of SRAM cell for yield enhancement

14 years 1 months ago

Download online.sfsu.edu

In this paper, we have analyzed ond modeled the fiilure probabilities ofSRAM cells due to process parameter variations. A method to predict the yield of a memoiy chip based on the cell failureprobability isproposed The developedmethod is used in an early stage of a design cycle to minimize memory failure probability by statistically sizing ofSRAMcell.

Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand, Kaush

Real-time Traffic

Hardware | ICCAD 2004 | Memory Failure Probability | Probabilities OfSRAM Cells | Process Parameter Variations |

claim paper

» SystemLevel SRAM Yield Enhancement

» Leakage Current Based Stabilization Scheme for Robust SenseAmplifier Design for Yield Enha...

» SRAM ReadWrite Margin Enhancements Using FinFETs

» Adaptive sampling for efficient failure probability analysis of SRAM cells

» Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to E...

» Rethinking memory redundancy optimal bit cell repair for maximuminformation storage

» Worstcase design and margin for embedded SRAM

» Mitigation of intraarray SRAM variability using adaptive voltage architecture

Post Info
More Details (n/a)

Added	16 Mar 2010
Updated	16 Mar 2010
Type	Conference
Year	2004
Where	ICCAD
Authors	Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand, Kaushik Roy

Comments (0)

Sciweavers

Statistical design and optimization of SRAM cell for yield enhancement

Hardware | ICCAD 2004 | Memory Failure Probability | Probabilities OfSRAM Cells | Process Parameter Variations |

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers