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MICRO
2000
IEEE

The store-load address table and speculative register promotion

10 years 10 days ago
The store-load address table and speculative register promotion
Register promotion is an optimization that allocates a value to a register for a region of its lifetime where it is provably not aliased. Conventional compiler analysis cannot always prove that a value is free of aliases, and thus promotion cannot always be applied. This paper proposes a new hardware structure, the store-load address table (SLAT), which watches both load and store instructions to see if they conflict with entries loaded into the SLAT by explicit software mapping instructions. One use of the SLAT is to allow values to be promoted to registers when they cannot be proven to be promotable by conventional compiler analysis. We call this new optimization speculative register promotion. Using this technique, a value can be promoted to a register and aliased loads and stores to that value’s home memory location are caught and the proper fixup is performed. This paper will: a) describe the SLAT hardware and software; b) demonstrate that conventional register promotion is oft...
Matt Postiff, David Greene, Trevor N. Mudge
Added 01 Aug 2010
Updated 01 Aug 2010
Type Conference
Year 2000
Where MICRO
Authors Matt Postiff, David Greene, Trevor N. Mudge
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