Synchronous Elastic Circuits with Early Evaluation and Token Counterflow

A protocol for latency-insensitive design with early evaluation is presented. The protocol is based on a symmetric view of the system in which tokens carrying information move in the forward direction and anti-tokens canceling information move in the backward direction. An implementation of the protocol and an example illustrate the flow for converting a regular synchronous design into an elastic circuit with early evaluation. Categories and Subject Descriptors: B.5.2 [Registertransfer-level implementation]: Design Aids. General Terms: Design, Theory, Verification.

• Type: Conference
• Year: 2007
• Where: DAC
• Authors: Jordi Cortadella, Michael Kishinevsky
• Keywords: Backward Direction, DAC 2007, Design Automation, Early Evaluation, Regular Synchronous Design