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2003
Springer

Synthesis of Asynchronous Hardware from Petri Nets

8 years 8 months ago
Synthesis of Asynchronous Hardware from Petri Nets
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call for new approaches in the area of behavioural models. This paper focuses on some of recent developments and new opportunities for Petri nets in designing asynchronous circuits such as synthesis of asynchronous control circuits from large Petri nets generated from front-end specifications in hardware description languages. These new methods avoid using full reachability state space for logic synthesis. They include direct mapping of Petri nets to circuits, structural methods with linear programming, and synthesis from unfolding prefixes using SAT solvers.
Josep Carmona, Jordi Cortadella, Victor Khomenko,
Added 06 Jul 2010
Updated 06 Jul 2010
Type Conference
Year 2003
Where AC
Authors Josep Carmona, Jordi Cortadella, Victor Khomenko, Alexandre Yakovlev
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