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2002
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The Synthesis of a Hardware Scheduler for Non-Manifest Loops

10 years 7 months ago
The Synthesis of a Hardware Scheduler for Non-Manifest Loops
This paper1 addresses the hardware implementation of a dynamic scheduler for non-manifest data dependent periodic loops. Static scheduling techniques which are known to give near optimal scheduling-solutions for manifest loops, fail at scheduling non-manifest loops, since they lack the run time information needed which makes a static schedule feasible. In this paper a dynamic scheduling approach was chosen to circumvent this problem. We present a case study using VHDL were the focus lies on implementations with minimal memory usage and low communication overhead between various components of the architecture. This has resulted in an efficient and synthesisable system.
Omar Mansour, Egbert Molenkamp, Thijs Krol
Added 14 Jul 2010
Updated 14 Jul 2010
Type Conference
Year 2002
Where DSD
Authors Omar Mansour, Egbert Molenkamp, Thijs Krol
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