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2002
IEEE

Synthesis of High Performance Low Power Dynamic CMOS Circuits

10 years 11 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, conventional logic design approaches cannot be used for Domino/Nora logic synthesis. To overcome this problem, we have used a new concept called unate decomposition of Boolean functions. The unate decomposition expresses a general Boolean function in terms of only a minimum number positive and negative unate functions, which can be readily mapped to a two-level network of Domino/Nora logic circuit. To deal with functions of very large number of variables, a function is first decomposed into sub-functions of not more than 15 variables. Unate decomposition is efficiently performed for each of these sub-functions independently. However, two-level Domino/Nora realization for these functions are quite often not suitable for the realization of practical VLSI circuits having reasonable delay because of the large number of ...
Debasis Samanta, Nishant Sinha, Ajit Pal
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2002
Where VLSID
Authors Debasis Samanta, Nishant Sinha, Ajit Pal
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