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CORR
2002
Springer

Synthesis of Low-Power Digital Circuits Derived from Binary Decision Diagrams

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Synthesis of Low-Power Digital Circuits Derived from Binary Decision Diagrams
-- This paper introduces a novel method for synthesizing digital circuits derived from Binary Decision Diagrams (BDDs) that can yield to reduction in power dissipation. The power reduction is achieved by decreasing the switching activity in a circuit while paying close attention to information measures as an optimization criterion. We first present the technique of efficient BDDbased computation of information measures which are used to guide the power optimization procedures. Using this technique, we have developed an algorithm of BDD reordering which leads to reducing the power consumption of the circuits derived from BDDs. Results produced by the synthesis on the ISCAS benchmark circuits are very encouraging.
Denis V. Popel
Added 18 Dec 2010
Updated 18 Dec 2010
Type Journal
Year 2002
Where CORR
Authors Denis V. Popel
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