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FPGA
2004
ACM

In-system FPGA prototyping of an itanium microarchitecture

10 years 17 days ago
In-system FPGA prototyping of an itanium microarchitecture
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and supports a subset of the Itanium instruction set architecture. The microarchitecture model includes details such as multi-bundle instruction fetch, decode and issue; parallel pipelined execution units with scoreboarding and predicated bypassing; and multiple levels of cache hierarchies. The microarchitecture model is synthesized and prototyped on a special FPGA card that allows the processor model to interface directly to the memory bus of a host PC. This is an effort toward developing a flexible microprocessor prototyping framework for rapid design exploration.
Roland E. Wunderlich, James C. Hoe
Added 01 Jul 2010
Updated 01 Jul 2010
Type Conference
Year 2004
Where FPGA
Authors Roland E. Wunderlich, James C. Hoe
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