Sciweavers

Share
HPCA
2008
IEEE

System level analysis of fast, per-core DVFS using on-chip switching regulators

11 years 6 days ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known technique to reduce energy in digital systems, but the effectiveness of DVFS is hampered by slow voltage transitions that occur on the order of tens of microseconds. In addition, the recent trend towards chipmultiprocessors (CMP) executing multi-threaded workloads with heterogeneous behavior motivates the need for per-core DVFS control mechanisms. Voltage regulators that are integrated onto the same chip as the microprocessor core provide the benefit of both nanosecond-scale voltage switching and per-core voltage control. We show that these characteristics provide significant energy-saving opportunities compared to traditional off-chip regulators. However, the implementation of on-chip regulators presents many challenges including regulator efficiency and output voltage transient characteristics, which are significa...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2008
Where HPCA
Authors Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, David Brooks
Comments (0)
books