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ICCAD
2008
IEEE

System-level power estimation using an on-chip bus performance monitoring unit

12 years 6 months ago
System-level power estimation using an on-chip bus performance monitoring unit
In this paper we propose an on-chip bus PMU which makes accurate estimates of system power consumption from a first-order linear power model by utilizing system-level activity information exchanged on the on-chip bus. It can easily be customized for different on-chip and off-chip memory devices, and is not dependent on a specific CPU core. We model memory devices using energy state machines, describe them in XML, and use that description automatic synthesis of the PMU. We compare the short-term accuracy of the proposed PMU with a cycle-accurate system-level power estimator, and assess its long-term accuracy with a real hardware prototype. Experimental results show that the the power estimation deviates less than 5% from real measurements.
Youngjin Cho, Younghyun Kim, Sangyoung Park, Naehy
Added 16 Mar 2010
Updated 16 Mar 2010
Type Conference
Year 2008
Where ICCAD
Authors Youngjin Cho, Younghyun Kim, Sangyoung Park, Naehyuck Chang
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