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CTRSA
2005
Springer

A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box

12 years 7 months ago
A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box
This work proposes a compact implementation of the AES S-box using composite field arithmetic in GF(((22 ) 2 ) 2 ). It describes a systematic exploration of different choices for the irreducible polynomials that generate the extension fields. It also examines all possible transformation matrices that map one field representation to another. We show that the area of Satoh’s S-box, which is the most compact to our knowledge, is at least 5% away from an optimal solution. We implemented this optimal solution and Satoh’s design using a 0.18 µm standard cell library.
Nele Mentens, Lejla Batina, Bart Preneel, Ingrid V
Added 26 Jun 2010
Updated 26 Jun 2010
Type Conference
Year 2005
Where CTRSA
Authors Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
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