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2008
ACM

SystemVerilog implicit port enhancements accelerate system design & verification

9 years 11 months ago
SystemVerilog implicit port enhancements accelerate system design & verification
Clifford E. Cummings
Added 12 Nov 2009
Updated 12 Nov 2009
Type Conference
Year 2008
Where DAC
Authors Clifford E. Cummings
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