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MSE
2003
IEEE

Teaching Trade-offs in System-level Design Methodologies

13 years 9 months ago
Teaching Trade-offs in System-level Design Methodologies
This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The purpose of the class is to explore the impact of system-level optimization for various target platforms using EDA.
Kazuo Sakiyama, Patrick Schaumont, David Hwang, In
Added 05 Jul 2010
Updated 05 Jul 2010
Type Conference
Year 2003
Where MSE
Authors Kazuo Sakiyama, Patrick Schaumont, David Hwang, Ingrid Verbauwhede
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