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VTS
2003
IEEE

Test Resource Partitioning and Optimization for SOC Designs

13 years 9 months ago
Test Resource Partitioning and Optimization for SOC Designs
1 We propose a test resource partitioning and optimization technique for core-based designs. Our technique includes test set selection and test resource floor-planning with the aim of minimizing the total test application time and the routing of the added TAM (test access mechanism) wires. A feature of our approach is that it pinpoints bottlenecks that are likely to limit the test solution, which is important in the iterative test solution development process. We demonstrate the usefulness of the technique through a comparison with a test scheduling and TAM design tool.
Erik Larsson, Hideo Fujiwara
Added 05 Jul 2010
Updated 05 Jul 2010
Type Conference
Year 2003
Where VTS
Authors Erik Larsson, Hideo Fujiwara
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