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GLVLSI
2010
IEEE

Thermal-aware voltage droop compensation for multi-core architectures

9 years 1 months ago
Thermal-aware voltage droop compensation for multi-core architectures
As the rated performance of microprocessors increases, voltage droop emergencies become a significant problem. In this paper, two new techniques to combat voltage droop emergencies are explored. First, a direct connection between temperature and processor clock frequency modulation during voltage droops is established. In general, a higher temperature leads to a lower voltage droop with the same processor activity. Thus, processor frequencies can be reduced less at high temperature in an effort to prevent voltage emergencies. Through experimentation, the benefits of temperature-flexible frequency scaling are explored. Second, processor signatures consisting of performance statistics are used to identify when voltage droop compensation is needed in a multicore environment. The use of an independent on-chip interconnect network allows for the sharing of signatures across cores at run time. Signature sharing in combination with frequency throttling is shown to provide an improvement in a...
Jia Zhao, Basab Datta, Wayne P. Burleson, Russell
Added 12 Oct 2010
Updated 12 Oct 2010
Type Conference
Year 2010
Where GLVLSI
Authors Jia Zhao, Basab Datta, Wayne P. Burleson, Russell Tessier
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