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2005
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From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling

8 years 11 months ago
From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework comprising of welldefined communication protocols and synthesizable communication wrappers, the process of refining the TLM specification of a HW/SW system to its synthesizable implementation can be systematically automated. We look at how to map the TLM communication channels of both HW and SW components to virtually any target platform and illustrate our approach on refining an example HW/SW system from its TLM specification to a Virtex-II Pro FPGA implementation.
Wolfgang Klingauf, Robert Günzel
Added 24 Jun 2010
Updated 24 Jun 2010
Type Conference
Year 2005
Where FPT
Authors Wolfgang Klingauf, Robert Günzel
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