Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

11

CODES
2003
IEEE

favoriteEmaildiscussreport

111views Software Engineering» more CODES 2003»

Transaction level modeling: an overview

13 years 9 months ago

Transaction level modeling: an overview

Download www.cecs.uci.edu

Recently, the transaction-level modeling has been widely referred to in system-level design community. However, the transaction-level models(TLMs) are not well deﬁned and the usage of TLMs in the existing design domains, namely modeling, validation, reﬁnement, exploration, and synthesis, is not well coordinated. This paper introduces a TLM taxonomy and compares the beneﬁts of TLMs’ use. Categories and Subject Descriptors C.0 [Computer Systems Organization]: General General Terms Design Keywords Transaction level model, modeling, validation, reﬁnement, exploration, synthesis

Lukai Cai, Daniel Gajski

Real-time Traffic

CODES 2003 | Design Keywords Transaction | Hardware-Software Codesign | System-level Design Community | Transaction-level Modeling |

claim paper

Related Content

» Systematic Transaction Level Modeling of Embedded Systems with SystemC

» Jironde A Flexible Framework for Making Components Transactional

» TransactionLevel Modeling for Sensor Networks Using SystemC

» Evaluating transaction trust and risk levels in peertopeer ecommerce environments

» Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus mode...

» SystemC transaction level models and RTL verification

» Unbounded pagebased transactional memory

» Virtual prototyping of embedded platforms for wireless and multimedia

» A power estimation methodology for systemC transaction level models

Post Info
More Details (n/a)

Added	04 Jul 2010
Updated	04 Jul 2010
Type	Conference
Year	2003
Where	CODES
Authors	Lukai Cai, Daniel Gajski

Comments (0)