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ASPLOS
2004
ACM

An ultra low-power processor for sensor networks

11 years 5 months ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on an asynchronous data-driven 16-bit RISC core with an extremely low-power idle state, and a wakeup response latency on the order of tens of nanoseconds. The processor instruction set is optimized for sensor-network applications, with support for event scheduling, pseudo-random number generation, bitfield operations, and radio/sensor interfaces. SNAP/LE has a hardware event queue and event coprocessors, which allow the processor to avoid the overhead of operating system software (such as task schedulers and external interrupt servicing), while still providing a straightforward programming interface to the designer. The processor can meet performance levels required for data monitoring applications while executing instructions with tens of picojoules of energy. We evaluate the energy consumption of SNAP/LE wit...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man
Added 30 Jun 2010
Updated 30 Jun 2010
Type Conference
Year 2004
Where ASPLOS
Authors Virantha N. Ekanayake, Clinton Kelly IV, Rajit Manohar
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