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2002
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Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design

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Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with the concept of wrapper. Wrappers allow automatic adaptation of physical interfaces to a communication network. We also give a generic architecture to produce these wrappers, either for processors or for other specific components such as memory IP. This approach has successfully been applied on a low-level image processing application. General Terms Design, Experimentation. Categories and Subject Descriptors C.0 [General]: system architecture, Hardware/software interfaces Keywords Embedded Memory, System-on-Chip, Memory access, Memory Wrapper Generation.
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali
Added 15 Jul 2010
Updated 15 Jul 2010
Type Conference
Year 2002
Where ISSS
Authors Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali, Frédéric Rousseau, Ferid Gharsalli
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