Sciweavers

Share
ICES
2010
Springer

The Use of Genetic Algorithm to Reduce Power Consumption during Test Application

11 years 6 months ago
The Use of Genetic Algorithm to Reduce Power Consumption during Test Application
Abstract. In this paper it is demonstrated how two issues from the area of testing electronic components can be merged and solved by means of a genetic algorithm. The two issues are the ordering of test vectors and scan registers with the goal of reducing switching activity during test application and power consumption as a consequence of the ordering. The principles of developing an optimizing procedure with the aim of achieving a solution satisfying the required value of power consumption during power consumption are described here. A basic description of the methodology together with the functions needed to implement the procedures is provided. Experimental results are also discussed.
Jaroslav Skarvada, Zdenek Kotásek, Josef St
Added 12 Feb 2011
Updated 12 Feb 2011
Type Journal
Year 2010
Where ICES
Authors Jaroslav Skarvada, Zdenek Kotásek, Josef Strnadel
Comments (0)
books