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2002
IEEE

Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP

11 years 4 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture are variable partitioning and scheduling. However, there’s little research work that has been done on these problems. In this paper, we present a new graph model for tackling the variable partitioning problem, namely, Variable Independence Graph (VIG), which provides more precise information for variable partitioning compared to the previous graph models. We also present a scheduling algorithm that takes advantages of multiple memory modules, Rotation Scheduling with Variable Re-partition (RSVR). It’s a new scheduling technique based on retiming and software pipelining. It may re-partition the variables if necessary during the scheduling process. The experiment results show that the average improvement on schedule length by using the algorithm is 44.8%. Another major contribution of this paper is that we in...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
Added 15 Jul 2010
Updated 15 Jul 2010
Type Conference
Year 2002
Where IPPS
Authors Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
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